diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index afb0688cb1c2..5d8f3e1f1419 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -661,6 +661,10 @@ smc_reboot: reboot { }; }; + smc_hwmon: smc_hwmon { + compatible = "apple,smc-hwmon"; + }; + pinctrl_smc: pinctrl@23e820000 { compatible = "apple,t8103-pinctrl", "apple,pinctrl"; reg = <0x2 0x3e820000 0x0 0x4000>; diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 590d3d550acb..39b3f462c2b6 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -358,6 +358,18 @@ config SENSORS_APPLESMC Say Y here if you have an applicable laptop and want to experience the awesome power of applesmc. +config SENSORS_APPLE_SOC_SMC + tristate "Apple SOC SMC Sensors (Power supply voltages, current and power, Temperature sensors, Fan status)" + depends on ARCH_APPLE + help + This driver provides support for the Apple System Management + Controller. + + Only Apple Soc based models are supported. + + Say Y here if you have an applicable laptop and want to experience + the awesome power of applesmc on Apple SOC machines. + config SENSORS_ARM_SCMI tristate "ARM SCMI Sensors" depends on ARM_SCMI_PROTOCOL diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 007e829d1d0d..e095d8c1d7b0 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_SENSORS_ADT7470) += adt7470.o obj-$(CONFIG_SENSORS_ADT7475) += adt7475.o obj-$(CONFIG_SENSORS_AHT10) += aht10.o obj-$(CONFIG_SENSORS_APPLESMC) += applesmc.o +obj-$(CONFIG_SENSORS_APPLE_SOC_SMC) += apple_soc_smc.o obj-$(CONFIG_SENSORS_AQUACOMPUTER_D5NEXT) += aquacomputer_d5next.o obj-$(CONFIG_SENSORS_ARM_SCMI) += scmi-hwmon.o obj-$(CONFIG_SENSORS_ARM_SCPI) += scpi-hwmon.o diff --git a/drivers/hwmon/apple_soc_smc.c b/drivers/hwmon/apple_soc_smc.c new file mode 100644 index 000000000000..bfeaae39a723 --- /dev/null +++ b/drivers/hwmon/apple_soc_smc.c @@ -0,0 +1,504 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Apple SOC SMC Hw Monitoring module + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct macsmc_hwmon { + struct device *dev; + struct apple_smc *smc; + struct device *hwmon_dev; +}; + +static u32 convert_float_celsius_to_int_millicelsius(u32 flt){ + unsigned int sign,exp,mant; + unsigned long val; + int i,b; + u32 result; + + sign=flt>>31; + exp=flt>>23; + mant=flt<<9>>9; + + val=0; + for(i=22;i>=0;i-=1){ + b=(mant&(1<>i; + val+=b*(1000000000>>(23-i)); + } + result = ((val+1000000000)<<(exp-127))/1000000; + return result; +} + +struct temp_info{ + u32 smc_key; + char label[60]; +}; + +/* MBA M1 Platform name: #680: RPlt = (ch8*, 0x84) b'j313_8fs' */ + + +static const struct temp_info apple_soc_smc_temp_table[] = { + {SMC_KEY(TSCD),"Temp SOC CORE AREA BACKSIDE(TSCD)"}, + {SMC_KEY(TB0T),"Temp Battery TS_MAX(TB0T)"}, + {SMC_KEY(TB1T),"Temp Battery TS1(TB1T)"}, + {SMC_KEY(TB1T),"Temp Battery TS2(TB2T)"}, + {SMC_KEY(TCHP),"Temp CHARGER, BETWEEN INDUCTOR AND MOSFETS(TCHP)"}, + {SMC_KEY(TCMb),"Temp (TCMb)"}, + {SMC_KEY(TCMz),"Temp (TCMz)"}, + {SMC_KEY(TH0T),"Temp LOWERLEFTCORNEROFNANDDEVICES(TH0T)"}, + {SMC_KEY(TH0x),"Temp MaxNANDProximityTemp(TH0x)"}, + {SMC_KEY(TSCD),"Temp SOCCOREAREABACKSIDE(TOP)(TSCD)"}, + {SMC_KEY(TVS0),"Temp P1V8VDDH_THMSNS1?(TVS0)"}, + {SMC_KEY(TVS1),"Temp P1V8VDDH_THMSNS2?(TVS1)"}, + {SMC_KEY(TVSx),"Temp P1V8VDDH_THMSNSxmax(TVSx)"}, + {SMC_KEY(Tc0b),"Temp SOCAvgw/offsetClusterDieTemp(Tc0b)"}, + {SMC_KEY(Th0x),"Temp MaxNANDProximityTemp(Th0x)"}, + {SMC_KEY(Th1a),"Temp GPUTemp(Th1a)"}, + {SMC_KEY(Th2a),"Temp PCPUTemp(Th2a)"}, + {SMC_KEY(Ts1a),"Temp GPUMTRDieTemp(Ts1a)"}, + {SMC_KEY(Ts2a),"Temp PCPUMTRDieTemp(Ts2a)"}, + {SMC_KEY(TIOP),"Temp ThunderboltProximity(TIOP)"}, + {SMC_KEY(TMVR),"Temp 3.8VAONVRBETWEENPHASE2AND(TMVR)"}, + {SMC_KEY(TPMP),"Temp MASTERPMU,BETWEENBUCK0ANDBUCK1INDUCTORS(TPMP)"}, + {SMC_KEY(TPSP),"Temp SLAVEPMU,BUCK10INDUCTORPROXIMITY(TPSP)"}, + {SMC_KEY(TW0P),"Temp WLBTtemperature(TW0P)"}, + {SMC_KEY(Tc0a),"Temp (Tc0a)"}, + {SMC_KEY(Tc0x),"Temp (Tc0x)"}, + {SMC_KEY(Tc0z),"Temp (Tc0z)"}, + {SMC_KEY(Tc7a),"Temp (Tc7a)"}, + {SMC_KEY(Tc7b),"Temp (Tc7b)"}, + {SMC_KEY(Tc7x),"Temp (Tc7x)"}, + {SMC_KEY(Tc7z),"Temp (Tc7z)"}, + {SMC_KEY(Tc8a),"Temp (Tc8a)"}, + {SMC_KEY(Tc8b),"Temp (Tc8b)"}, + {SMC_KEY(Tc8x),"Temp (Tc8x)"}, + {SMC_KEY(Tc8z),"Temp (Tc8z)"}, + {SMC_KEY(Tc9a),"Temp (Tc9a)"}, + {SMC_KEY(Tc9b),"Temp (Tc9b)"}, + {SMC_KEY(Tc9x),"Temp (Tc9x)"}, + {SMC_KEY(Tc9z),"Temp (Tc9z)"}, + {SMC_KEY(Tcaa),"Temp (Tcaa)"}, + {SMC_KEY(Tcab),"Temp (Tcab)"}, + {SMC_KEY(Tcax),"Temp (Tcax)"}, + {SMC_KEY(Tcaz),"Temp (Tcaz)"}, + {SMC_KEY(Te0a),"Temp (Te0a)"}, + {SMC_KEY(Te0b),"Temp (Te0b)"}, + {SMC_KEY(Te0x),"Temp (Te0x)"}, + {SMC_KEY(Te0z),"Temp (Te0z)"}, + {SMC_KEY(Te3a),"Temp (Te3a)"}, + {SMC_KEY(Te3b),"Temp (Te3b)"}, + {SMC_KEY(Te3x),"Temp (Te3x)"}, + {SMC_KEY(Te3z),"Temp (Te3z)"}, + {SMC_KEY(Th0a),"Temp (Th0a)"}, + {SMC_KEY(Th0b),"Temp (Th0b)"}, + {SMC_KEY(Th0z),"Temp (Th0z)"}, + {SMC_KEY(Th1b),"Temp (Th1b)"}, + {SMC_KEY(Th1x),"Temp (Th1x)"}, + {SMC_KEY(Th1z),"Temp (Th1z)"}, + {SMC_KEY(Th2b),"Temp (Th2b)"}, + {SMC_KEY(Th2x),"Temp (Th2x)"}, + {SMC_KEY(Th2z),"Temp (Th2z)"}, + {SMC_KEY(Tp2a),"Temp (Tp2a)"}, + {SMC_KEY(Tp2b),"Temp (Tp2b)"}, + {SMC_KEY(Tp2x),"Temp (Tp2x)"}, + {SMC_KEY(Tp2z),"Temp (Tp2z)"}, + {SMC_KEY(Tp3a),"Temp (Tp3a)"}, + {SMC_KEY(Tp3b),"Temp (Tp3b)"}, + {SMC_KEY(Tp3x),"Temp (Tp3x)"}, + {SMC_KEY(Tp3z),"Temp (Tp3z)"}, + {SMC_KEY(Tp4a),"Temp (Tp4a)"}, + {SMC_KEY(Tp4b),"Temp (Tp4b)"}, + {SMC_KEY(Tp4x),"Temp (Tp4x)"}, + {SMC_KEY(Tp4z),"Temp (Tp4z)"}, + {SMC_KEY(Tp5a),"Temp (Tp5a)"}, + {SMC_KEY(Tp5b),"Temp (Tp5b)"}, + {SMC_KEY(Tp5x),"Temp (Tp5x)"}, + {SMC_KEY(Tp5z),"Temp (Tp5z)"}, + {SMC_KEY(Tp7a),"Temp (Tp7a)"}, + {SMC_KEY(Tp7b),"Temp (Tp7b)"}, + {SMC_KEY(Tp7x),"Temp (Tp7x)"}, + {SMC_KEY(Tp7z),"Temp (Tp7z)"}, + {SMC_KEY(Tp8a),"Temp (Tp8a)"}, + {SMC_KEY(Tp8b),"Temp (Tp8b)"}, + {SMC_KEY(Tp8x),"Temp (Tp8x)"}, + {SMC_KEY(Tp8z),"Temp (Tp8z)"}, + {SMC_KEY(Tp9a),"Temp (Tp9a)"}, + {SMC_KEY(Tp9b),"Temp (Tp9b)"}, + {SMC_KEY(Tp9x),"Temp (Tp9x)"}, + {SMC_KEY(Tp9z),"Temp (Tp9z)"}, + {SMC_KEY(Ts0a),"Temp (Ts0a)"}, + {SMC_KEY(Ts0b),"Temp (Ts0b)"}, + {SMC_KEY(Ts0x),"Temp (Ts0x)"}, + {SMC_KEY(Ts0z),"Temp (Ts0z)"}, + {SMC_KEY(Ts1b),"Temp (Ts1b)"}, + {SMC_KEY(Ts1x),"Temp (Ts1x)"}, + {SMC_KEY(Ts1z),"Temp (Ts1z)"}, + {SMC_KEY(Ts2b),"Temp (Ts2b)"}, + {SMC_KEY(Ts2x),"Temp (Ts2x)"}, + {SMC_KEY(Ts2z),"Temp (Ts2z)"}, + {SMC_KEY(TVA0),"Temp (TVA0)"}, + {SMC_KEY(TVD0),"Temp (TVD0)"}, + /* +TH0T LOWER LEFT CORNER OF NAND DEVICES +TH0x Max NAND Proximity Temp +TIOP I/O PROXIMITY +TIOP Thunderbolt Proximity +TMVR 3.8V AON VR BETWEEN PHASE 2 AND PHASE3 MOSFETS +TMVR - P3V8AON_THMSNS +TPMP MASTER PMU, BETWEEN BUCK0 AND BUCK1 INDUCTORS +TPMP - MPMU +TPSP SLAVE PMU, BUCK10 INDUCTOR PROXIMITY +TPSP - SPMU +TSCD SOC CORE AREA BACKSIDE (TOP) +TVS0 - P1V8VDDH_THMSNS1? +TVS1 - P1V8VDDH_THMSNS2? +TVSx - P1V8VDDH_THMSNSx max +TW0P Airport Proximity +TW0P WLANBT, BACKSIDE +TW0P - WLBT temperature +Tc0b SOC Avg w/offset Cluster Die Temp +Th0x Max NAND Proximity Temp +Th1a GPU Temp +Th2a PCPU Temp +Ts1a GPU MTR Die Temp +Ts2a PCPU MTR Die Temp + + * #798: TH0T = (flt , 0x85) 35.549560546875 +#799: TH0x = (flt , 0x85) 35.549560546875 +#800: TIOP = (flt , 0x85) 37.193695068359375 +#801: TMVR = (flt , 0x85) 35.86936950683594 +#802: TPMP = (flt , 0x85) 36.22523498535156 +#803: TPSP = (flt , 0x85) 36.72523498535156 +#810: TSCD = (flt , 0x85) 35.148651123046875 +#811: TVA0 = (flt , 0x85) 27.764366149902344 +#812: TVD0 = (flt , 0x85) 46.171024322509766 +#813: TVS0 = (flt , 0x85) 31.897750854492188 +#814: TVS1 = (flt , 0x85) 33.67891311645508 +#815: TVSx = (flt , 0x85) 33.67891311645508 +#816: TW0P = (flt , 0x85) 35.65766906738281 +#822: Tc0a = (flt , 0x85) 34.502506256103516 +#823: Tc0b = (flt , 0x85) 34.502506256103516 +#824: Tc0x = (flt , 0x85) 35.90625 +#825: Tc0z = (flt , 0x85) 35.90625 +#850: Tc7a = (flt , 0x85) 32.649532318115234 +#851: Tc7b = (flt , 0x85) 32.649532318115234 +#852: Tc7x = (flt , 0x85) 35.390625 +#853: Tc7z = (flt , 0x85) 35.390625 +#854: Tc8a = (flt , 0x85) 35.64579772949219 +#855: Tc8b = (flt , 0x85) 35.64579772949219 +#856: Tc8x = (flt , 0x85) 38.140625 +#857: Tc8z = (flt , 0x85) 38.140625 +#858: Tc9a = (flt , 0x85) 36.01177215576172 +#859: Tc9b = (flt , 0x85) 36.01177215576172 +#860: Tc9x = (flt , 0x85) 37.828125 +#861: Tc9z = (flt , 0x85) 37.828125 +#862: Tcaa = (flt , 0x85) 35.11748504638672 +#863: Tcab = (flt , 0x85) 35.11748504638672 +#864: Tcax = (flt , 0x85) 37.328125 +#865: Tcaz = (flt , 0x85) 37.328125 +#866: Te0a = (flt , 0x85) 30.76156234741211 +#867: Te0b = (flt , 0x85) 30.76156234741211 +#868: Te0x = (flt , 0x85) 32.6875 +#869: Te0z = (flt , 0x85) 32.6875 +#870: Te3a = (flt , 0x85) 32.577030181884766 +#871: Te3b = (flt , 0x85) 41.27703094482422 +#872: Te3x = (flt , 0x85) 35.390625 +#873: Te3z = (flt , 0x85) 55.390625 + +#876: Th0a = (flt , 0x85) 34.35187530517578 +#877: Th0b = (flt , 0x85) 34.35187530517578 +#878: Th0x = (flt , 0x85) 34.5625 +#879: Th0z = (flt , 0x85) 34.5625 +#880: Th1a = (flt , 0x85) 34.363319396972656 +#881: Th1b = (flt , 0x85) 43.363319396972656 +#882: Th1x = (flt , 0x85) 34.625 +#883: Th1z = (flt , 0x85) 43.625 +#884: Th2a = (flt , 0x85) 34.23957061767578 +#885: Th2b = (flt , 0x85) 43.23957061767578 +#886: Th2x = (flt , 0x85) 34.546875 +#887: Th2z = (flt , 0x85) 43.546875 +#888: Tp2a = (flt , 0x85) 32.774227142333984 +#889: Tp2b = (flt , 0x85) 41.874229431152344 +#890: Tp2x = (flt , 0x85) 35.03125 +#891: Tp2z = (flt , 0x85) 50.03125 +#892: Tp3a = (flt , 0x85) 35.187313079833984 +#893: Tp3b = (flt , 0x85) 42.58731460571289 +#894: Tp3x = (flt , 0x85) 37.8125 +#895: Tp3z = (flt , 0x85) 49.8125 +#896: Tp4a = (flt , 0x85) 35.114498138427734 +#897: Tp4b = (flt , 0x85) 45.214500427246094 +#898: Tp4x = (flt , 0x85) 38.140625 +#899: Tp4z = (flt , 0x85) 55.140625 +#900: Tp5a = (flt , 0x85) 36.01206970214844 +#901: Tp5b = (flt , 0x85) 46.21207046508789 +#902: Tp5x = (flt , 0x85) 37.828125 +#903: Tp5z = (flt , 0x85) 53.828125 +#904: Tp7a = (flt , 0x85) 32.269954681396484 +#905: Tp7b = (flt , 0x85) 41.369956970214844 +#906: Tp7x = (flt , 0x85) 34.578125 +#907: Tp7z = (flt , 0x85) 49.578125 +#908: Tp8a = (flt , 0x85) 34.88423538208008 +#909: Tp8b = (flt , 0x85) 42.284236907958984 +#910: Tp8x = (flt , 0x85) 37.046875 +#911: Tp8z = (flt , 0x85) 49.046875 +#912: Tp9a = (flt , 0x85) 34.37004852294922 +#913: Tp9b = (flt , 0x85) 44.47004699707031 +#914: Tp9x = (flt , 0x85) 37.328125 +#915: Tp9z = (flt , 0x85) 54.328125 +#916: Ts0a = (flt , 0x85) 33.5078125 +#917: Ts0b = (flt , 0x85) 33.5078125 +#918: Ts0x = (flt , 0x85) 35.3125 +#919: Ts0z = (flt , 0x85) 35.3125 +#920: Ts1a = (flt , 0x85) 34.453399658203125 +#921: Ts1b = (flt , 0x85) 39.453399658203125 +#922: Ts1x = (flt , 0x85) 35.90625 +#923: Ts1z = (flt , 0x85) 40.90625 +#924: Ts2a = (flt , 0x85) 32.378868103027344 +#925: Ts2b = (flt , 0x85) 37.378868103027344 +#926: Ts2x = (flt , 0x85) 33.90625 +#927: Ts2z = (flt , 0x85) 38.90625 + */ +}; + +static int apple_soc_smc_read_labels(struct device *dev, + enum hwmon_sensor_types type, + u32 attr, int channel, const char **str) +{ + switch (type) { + case hwmon_temp: + *str = apple_soc_smc_temp_table[channel].label; + break; + default: + return -EOPNOTSUPP; + } + return 0; + +} + +static int apple_soc_smc_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + struct macsmc_hwmon *hwmon = dev_get_drvdata(dev); + struct apple_smc *smc = hwmon->smc; + + int ret = 0; + u32 vu32; + + if (type == hwmon_temp){ + if (channel < 100){ + ret = apple_smc_read_u32(smc,apple_soc_smc_temp_table[channel].smc_key, &vu32); + vu32=convert_float_celsius_to_int_millicelsius(vu32); + *val = vu32; + return ret; + } + else + return -EOPNOTSUPP; + } + return -EOPNOTSUPP; +} + + +static int apple_soc_smc_write(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long val) +{ + return -EOPNOTSUPP; +} + +static umode_t apple_soc_smc_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + umode_t mode = 0444; + return mode; +} + +static const struct hwmon_channel_info *apple_soc_smc_info[] = { + HWMON_CHANNEL_INFO(chip, + HWMON_C_REGISTER_TZ), + /* + * Let's read TSCD SOC CORE AREA BACKSIDE (TOP) + * #810: TSCD = (flt , 0x85) 35.148651123046875 + + */ + HWMON_CHANNEL_INFO(temp, + HWMON_T_INPUT|HWMON_T_LABEL, + /* #786: TB0T = (flt , 0x85) 32.399993896484375 */ + HWMON_T_INPUT|HWMON_T_LABEL, + /* #787: TB1T = (flt , 0x85) 32.399993896484375 */ + HWMON_T_INPUT|HWMON_T_LABEL, + /* #788: TB2T = (flt , 0x85) 31.29998779296875 */ + HWMON_T_INPUT|HWMON_T_LABEL, + /* #789: TCHP = (flt , 0x85) 36.653167724609375 */ + HWMON_T_INPUT|HWMON_T_LABEL, + /* #790: TCMb = (flt , 0x85) 46.171024322509766 */ + HWMON_T_INPUT|HWMON_T_LABEL, + /* #791: TCMz = (flt , 0x85) 55.390625 */ + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL, + HWMON_T_INPUT|HWMON_T_LABEL), + NULL +}; + +static const struct hwmon_ops apple_soc_smc_hwmon_ops = { + .is_visible = apple_soc_smc_is_visible, + .read = apple_soc_smc_read, + .read_string = apple_soc_smc_read_labels, + .write = apple_soc_smc_write, +}; + +static const struct hwmon_chip_info apple_soc_smc_chip_info = { + .ops = &apple_soc_smc_hwmon_ops, + .info = apple_soc_smc_info, +}; + + +static int apple_soc_smc_hwmon_probe(struct platform_device *pdev) +{ + struct apple_smc *smc = dev_get_drvdata(pdev->dev.parent); + struct device *dev = &pdev->dev; + struct macsmc_hwmon *smc_hwmon; + + dev_err(&pdev->dev,"JFB: in apple_soc_smc_hwmon_probe. Connected to smc_core(%d keys)\n", + apple_smc_get_key_count(smc)); + + smc_hwmon = devm_kzalloc(&pdev->dev, sizeof(*smc_hwmon), GFP_KERNEL); + if (!smc_hwmon) + return -ENOMEM; + + smc_hwmon->dev = &pdev->dev; + smc_hwmon->smc = smc; +/* platform_set_drvdata(pdev, smc_hwmon);*/ +/* dev_set_drvdata(&pdev->dev, smc_hwmon); */ + + smc_hwmon->hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, + "apple_soc_smc_hwmon", smc_hwmon, + &apple_soc_smc_chip_info, NULL); + if (IS_ERR(smc_hwmon->hwmon_dev)) + return dev_err_probe(dev, PTR_ERR(smc_hwmon->hwmon_dev), + "failed to register hwmon device\n"); + + return 0; +} + +/* +static const struct of_device_id apple_soc_smc_of_match[] = { + { .compatible = "apple,smc-hwmon" }, + {} +}; +MODULE_DEVICE_TABLE(of, apple_soc_smc_of_match); +*/ +static struct platform_driver apple_soc_smc_hwmon_driver = { + .probe = apple_soc_smc_hwmon_probe, + .driver = { + .name = "macsmc-hwmon", + .owner = THIS_MODULE, +/* .of_match_table = apple_soc_smc_of_match,*/ + }, +}; +module_platform_driver(apple_soc_smc_hwmon_driver); + +MODULE_DESCRIPTION("Apple SOC SMC Hwmon driver"); +MODULE_AUTHOR("Jean-Francois Bortolotti "); +MODULE_LICENSE("GPL"); diff --git a/drivers/platform/apple/smc_core.c b/drivers/platform/apple/smc_core.c index daf029cd072f..0e9b838539ee 100644 --- a/drivers/platform/apple/smc_core.c +++ b/drivers/platform/apple/smc_core.c @@ -32,6 +32,9 @@ static const struct mfd_cell apple_smc_devs[] = { { .name = "macsmc-hid", }, + { + .name = "macsmc-hwmon", + }, { .name = "macsmc-power", },